FPGA/ASIC design engineer, San Diego, 6M contract

[sd_shooter]

FPGA/ASIC design engineer position in San Diego, CA

Description:
- Map a new design to a Xilinx FPGA platform (MCU, AHB, memory, custom logic)
- Perform full system simulation
- FPGA Constraints, Synthesis, P&R, Floorplanning
- Provide lab support throughout project
- Opportunity for ASIC, SOC and data path elements in addition to the FPGA
- 6 MONTH CONTRACT in San Diego, CA

Requirements:
- FPGA experience
- Xilinx, Vivado development suite
- Verilog, SV, C code, UVM
- ASIC flows: Synthesis, PLDRC, FV, CDC
- Standard interfaces: AHB, I2C, SPI, USB
- BS/MS degree, 5+ years

[truthseeker]

WOW!

If this was in Sacramento, it would be right up my alley!

Used the Xilinx Rabbit Core RCM2100 Prototyping Board for my Senior Project back in 2003 to make a micromouse find the center of a maze and then find the shortest path while increasing speed each time. Our team chose to use a flood fill algorithm for coding.

Good times!